The present invention relates to switching equipment for performing a switching operation of a high-speed packet (cell) in a broadband ISDN (Integrated Services Digital Network).
The broadband ISDN (B-ISDN) is capable of offering a variety of multimedia for voices, data and motion pictures. Further, an ATM switching equipment transfers the data on a cell unit in an asynchronous transfer mode (ATM) and is applicable to a wide range of communications from a low speed to a high speed. Accordingly, in the broadband ISDN, lines composed of optical fibers are connected to the ATM switching equipment.
In the early phase of broadband ISDN, a band width that would be employed by a subscriber is in the order of several megabytes per second (Mbps). If there are a small number of subscribers, it is enough that the ATM switching equipment accommodates, e.g., 50 to 100 lines of 150 Mbps lines. Also, if there are a small number of subscribers, as illustrated in FIG. 53, a transmission system 57 provided in front of an ATM switching equipment 100a performs multiple processing. The lines are thereby effectively utilized.
Further, when the transmission system 57 effects the multiplex processing, if a fault occurs in the broadband ISDN, much damage can result. Therefore, as illustrated in FIG. 54, the transmission systems 57, subscriber line interfaces (hereinafter referred to as line interfaces) 103, switches 104 and transit line interfaces 30 are duplicated in an active system and a standby system. Then, if trouble occurs, the switching equipment moves the switching operation from the active system to the standby system.
The line interface 103 is an interface for converting signals transmitted with a synchronous digital hierarchy (SDH) from the subscriber's terminal 101 into an ATM format and transmitting the signals to the switch 104. The switch 104 switches over an internal signal path in order to transmit the generated cells based on the ATM format to one of trunk lines. Herein, in the line interface shown in FIG. 55, a photoelectric (OE/EO) converting portion 11 converts an optical signal from a subscriber's line 53 composed of the optical cable into an electric signal or reversely converts the electric signal into the optical signal.
A synchronous digital hierarchy (SDH) terminal portion 12 of FIG. 55 terminates an SDH format transmitted via the transmission system 57 from the subscriber's terminal. The SDH format is a format in which a width (channel capacity) of the transmission path is divided into hierarchies (several stages), i.e., into physical layers so that the signals can be flexibly transmitted at a high efficiency when multiplexing through the transmission system 57.
FIG. 56 shows the SDH format. An SDH frame is structured such that there are provided nine rows in length, and there are provided a section overhead (SOH) as 9-octet control data and a 261-octet virtual container (VC-4). Based on this frame structure, an SDH basic bit rate is unified into 155.52 Mbits/s.
FIG. 57 illustrates cell mapping to the SDH frame. In FIG. 57, the SDH frame contains path overhead (POH) as an item of control data added to the virtual container. The SDH frame is mapped by an ATM cell consisting of a header and an item of user data.
A cell synchronous portion 13 in FIG. 55 effects cell error control on the basis of header error control data written to cell header and carries out a cell synchronous detection in order to reduce a cell loss due to the fact that a transmission path dot error turns out an ATM cell header error. A usage quantity parameter control (UPC) portion 14 as band management portion manages a band that should be employed by the user by monitoring traffic density.
An accounting portion 15 counts the cells and notifies the processor of data thereof as an item of accounting data. An operation and maintenance (OAM) portion 16 as alarm transfer cell management portion manages an OAM cell (an alarm transfer cell). A monitoring cell (MC) portion 17 monitors cell quality by measuring a cell error characteristic, cell loss characteristic and a cell delay characteristic by use of the MC cell.
A VPI/VCI conversion table 180 stores a virtual channel identifier (VCI) and a virtual path identifier (VPI) that are inputted and an output destination virtual channel identifier and an output destination virtual path identifier in a corresponding relationship.
A VPI/VCI (header) converting portion 18 reads the virtual channel identifier and the virtual path identifier that are written to the cell header. The VPI/VCI converting portion 18 converts the virtual path identifier into the output destination virtual path identifier and further converts the virtual channel identifier into the output destination channel identifier with reference to the VPI/VCI conversion table 180.
An output destination path is determined per cell by these output destination virtual channel and path identifiers. A microprocessor 19 controls the UPC portion 14, the accounting portion 15, the OAM portion 16, the MC portion 17 and the VPI/VCI converting portion 18.
Also, normally, when the switching equipment deals with the ATM cells, as illustrated in FIG. 52A, a cell enable signal ENB serving as an identifier to indicate whether the data cell is valid or invalid, a cell frame signal FRM defined as an identifier indicating a heading of the data cell and a clock pulse CLK are added in parallel to the data cell consisting of parallel signals.
The data cell is composed of, e.g., 16-bit parallel signals. The cell enable signal (ENB) outputs "H" (high) until the next FRM pulse but keeps "L" (low) status during other periods. The cell frame signal (FRM) outputs "H" by only 1 bit in synchronism with the cell heading but keeps the "L" status during other periods.
However, the line interface contains a plurality of large scale integrated lines (LSIs) to perform the above high-level function. Further, when the number of subscribers to the broadband ISDN increases, the line interface also rises in number. This results in a scale-up of the line interfaces.
Moreover, when multiplexing the subscriber's line but effecting no duplication, if the fault is caused in a certain line interface, the line corresponding to this line interface is blocked. This results in the problem that all the multiplexed subscriber's lines can not be used.
Further, when transferring the data cell, 16 signal lines are needed for the data cell of a 16-bit parallel signal, one signal line for the cell frame signal, one signal line for the cell enable signal and one signal line for the clock pulse. Thus, the signal lines total 19. For this reason, there arises the problem that when a plurality of lines are accommodated, the number of signal lines considerably increases.
Further, FIG. 58 schematically illustrates a construction of the ATM switching equipment 100 employed for connecting the subscriber's terminal (TE) 101 to the transmission path in such an ATM system. Referring to FIG. 58, each subscriber's terminal (TE) 101 is connected directly or indirectly via a private branch exchange (PBX) 102 to the line interface 103.
Connected to the line interface 103 there is a switch interface 105 for converting signals transmitted in the synchronous digital hierarchy (SDH) format from the subscriber's terminal (TE) 101 into the ATM format and transmitting the signals to the switch 104.
The switch (SW) 104 switches over the internal signal path to transmit the ATM format based cell generated in the line interface 103 to any transmission path (not shown). Note that the switch interface 105 is an interface between the line interface 103 and the switch (SW) 104.
Also, the switch (SW) 104 is equipped with a plurality of buffers (not shown) for temporarily storing the cells transmitted to the trunk lines. Further, the switch (SW) 104 is duplicated to cope with the fault and can be switched over to either a "0" system switch 104a or a "1" system switch 104b.
Further, in the ATM switching equipment 100, if the line interface 103 breaks down, it is necessary for the line interface 103 to be removed for repair or replacement.
Under these conditions, as illustrated in FIG. 52B, on an input side of the switch interface 105, it follows that all of the data cell, the cell enable signal and the cell frame signal is stacked at "H" or "L" (stacked at "H" in the example of FIG. 52).
In the conventional ATM switching equipment 100, the switch interface 105 simply determines whether a cell is valid or not on the basis of the cell enable signal (ENB) but it is incapable of recognizing that the line interface 103 has been removed.
Accordingly, in the state of 52B, wherein the line interface 103 is removed, it follows that the switch interface 105 concludes that the effective data is still being transmitted.
In this case, the switch interface 105 recognizes all of the header containing the VCI and the user data as the effective data cell consisting of bits of "H". Then, this entity less cell is transmitted to the switch (SW) 104.
Consequently, this entity less cell is written to the buffer, and this buffer includes inaccurate information. Besides, there exists the possibility that the entityless cell can be mixed in with the data cells of other subscribers who select all "H" as VCIs by chance and enters communications of other subscribers that are being accurately carried out.
Up to now, if the line interface breaks down, the line is manually blocked, and thereafter the line interface is removed. Under such circumstances, it is necessary to have a line design such that when the line interface is removed, no adverse influence is exerted on other elements by automatically blocking the line.
It should be noted, as explained above, that high-speed data communications are practicable in the broadband ISDN. Therefore, a single unit of switching equipment is capable of processing a large amount of communication data. Further, even if the number of subscribers increases in the future, it is necessary that communication assets be effectively utilized.
Accordingly, it is required that the number of subscribers accommodated in the single switching equipment be increased. For this purpose, the ATM switching equipment has to incorporate the corresponding number of line interfaces.
This, however, introduces the problem that the scale of each ATM switching equipment 100 must be greatly increased. However, there is a great demand to have the ATM switching equipment 100 use less space for installation thereof.
Therefore, even if the number of the accomodatable subscribers increases, it is necessary that the scale-up of the ATM switching equipment be restricted. Further, even when the line interface remains a single line, it is also necessary to provide a design capable of surely detecting the removal of the line interface. Demanded further is a design capable of preventing the entity less cell from entering the switch portion (SW).